1. How timing sequences can be generated using shift registers?

A shift register is a register in which the contents may be shifted one or more places to the left or right. This type of register is capable of performing a variety of functions. It may be used for serial-to-parallel conversion and for scaling binary numbers.

Serial and parallel are terms used to describe the method in which data or information is moved from one place to another. SERIAL TRANSFER means that the data is moved along a single line o ne bit at a time. A control pulse is required to move each bit. PARALLEL TRANSFER means that each bit of data is moved on its own line and that all bits transfer simultaneously as they did in the parallel register. A single control pulse is required to move all bits.

SCALING means to change the magnitude of a number. Shifting binary numbers to the left increases their value, and shifting to the right decreases their value. The increase or decrease in value is based on powers of 2.

A shift of one place to the left increases the value by a power of 2, which in effect is multiplying the number by 2. To demonstrate this, let’s assume that the following block diagram is a 5-bit shift register containing the binary number 01100.

One of the most common uses of a shift register is to convert between serial and parallel interfaces. This is useful as many circuits work on groups of bits in parallel, but serial interfaces are simpler to construct. Shift registers can be used as simple delay circuits. Several bi-directional shift registers could also be connected in parallel for a hardware implementation of a stack.

Shift registers can be used also as a pulse extenders. Compared to monostable multi vibrators the timing has no dependency on component values, however requires external clock and the timing accuracy is limited by a granularity of this clock. Example – Ronja Twister, where five 74164 shift registers create the core of the timing logic this way

2. Write a short note on design of modulo-n counters.

The input lines carry streams of bits and the output line carries natural numbers between

0 and N ; 1. In the rst design step (1), a so called structural re nement, the black

box speci cation is re ned into a speci cation of a controller COL and a counter CNT .

The controller is responsible for resetting the counter whenever the counter’s most recent

output was N ; 1 and a new count signal is received. The counter itself increases or resets

the output value on demand. In the following we restrict ourself to the development of

the counter only. The second design step (2), a so called interface re nement, replaces

each output line which carries natural numbers by an appropriate number of output

lines carrying bits. The necessary number of lines is of course a function of N. The third

design step (3) is a so called action re nement. To allow hardware implementations

based on master/slave ip ops, where only impulses and not signals (sequence of 1’s)

are counted, we have to re ne the bits on the input lines in an adequate way. The

interesting action re nement is the re nement of a 1, which is represented by a 1 followed

by a 0 { consequently a sequence of 1’s is replaced by a sequence of impulses. The fourth

design step (4) is a combination of a structural and a behavioral re nement step. The

Specification of the counter achieved during the third design step is split into a network of identical component specifications. Each specification describes a bit-slice of the counterand could be implemented by a master/slave ip op. Note that the development of

the modulo N counter would of course also include the corresponding refinement steps

For the controller to ensure that both components, the controller and the counter, work

Properly together.

3. Explain temperature and weather forecast system with a neat circuit diagram.

· The barometer will be operated indoors. This will minimize output variations caused by temperature and will lengthen the calibration intervals. It also means the circuit board will not have to be weatherproofed.

· Will be easy to calibrate. This means there will be a maximum of 1 calibration adjustment.

· The operating range will be from 28.00 inHg to 32.00 inHg

· Resolution will be greater than .01 inHg from sea level to 10,000 feet.

· The interface will be standard Dallas Semiconductor 1-wire.

· Because the unit will be designed for indoor operation, it can be externally powered.

· Will utilize the Motorola MPX4115A pressure transducer.

Based on these assumptions, table 1 was generated. This table calculates the station pressure for both the minimum (28.00) and the maximum (32.00) pressures for altitudes from sea level to 10,000 feet in 1000 foot increments. The station pressure is then converted to MPX4115A pressure sensor volts. Looking at the table, I discovered the predominant change in altitude in the offset voltage of the pressure sensor. I decided that this will be the adjustable parameter, and that the circuit gain would be fixed.

The OA Offset column is the op amp offset voltage that compensates for altitude. This will be the only calibration variable. Since the instrumentation amplifier is a rail-to-rail device, in theory it will operate down to 0 volts. However, to provide some margin, the offsets were chosen to allow a minimum of .2 volts at the lowest pressure. The gain of 10 was chosen to allow maximum output voltage swing for all altitudes. The resulting op amp output voltages are listed in OA Output column. This is the voltage applied to the DS2438 Vad input.

Circuit Design:

The following circuit design satisfies these requirements. I selected the INA122 instrumentation amp for several reasons: it eliminated several external resistors and it provides a very stable gain over a wide temperature. It also provides excellent rail-to-rail operation allowing full use of the 10 volt input range of the DS2438. The 40.2K ohm resistor sets the gain to 10. The variable resistor allows adjustment of the offset voltage from 2.0v to 4.0v. All parts are available from Digikey except the pressure sensor, which is available from Newark.

Calibration:

Hardware calibration is simply a matter of setting the offset voltage to the value listed in table 1 for your altitude. A jumper on the input of the DS2438 allows the use of the DS2438 to measure the offset. Put the jumper in the A-C position and using the iButton Viewer for the DS2438, set the voltage to the table value using the 25-turn pot. Once it’s set, put the jumper in the A-B position to read pressure.

For altitudes in between the values listed in the table, simple interpolation will give accurate results. An Excel spreadsheet will be also available online to calculate intermediate values.

Software:

Routines currently exist to measure the DS2438s Vad voltage. Once this voltage is measured, the pressure is calculated using:

Press = slope * Vad + intercept

Where the slope and intercept are the values listed in table 1 for your altitude. The prototype code I used had an external text file to store the slope and intercept values.

This allows the user to edit the file to fine-tune the calibration if desired.

Fine-tuning can be accomplished by monitoring the pressure and comparing it with a known reference source, such as a nearby airport or NOAA weather. Start by adjusting the intercept. When the reference station indicates a pressure near mid-scale (30.00 inHg), adjust the software intercept value until your weather station matches. Now monitor the pressure extremes to determine if the slope needs adjustment.

4. Explain the working of MODEM.

Modems are devices used to access internet in a dial up internet connection. The word “Modem” is actually Derived from 2 terms, Modulator and Demodulator. The primary function of a modem is made up of two processes. One is to convert data from digital computer signals to analog signals to send over a phone line and other one is to convert analog signals into digital data when it is received through phone line. The process in which digital computer signals are converted to analog signals is called modulation. The process in which analog signals are converted back into digital is called demodulation.

The primary function of the modem seems very simple when you read the description given above. However, the actual process is much more intricate. It is divided into some smaller functions as explained below.

The process begins when the computer transmits data to modem to send over internet. However, there is a significant gap between ability of data transfer between computer and modem. Computers are capable of transmitting information to modems at a faster rate then the modems are able to the same over a phone line. Hence, modems use technique called Data Compression. Modems collect bits of information together and compresses then before transmitting them over a phone line. The modem then group bits together and applies compression algorithms to them. The data is compressed and sent over to the phone line. This allows the transmission of large number of bits of data at the same time.

The modem also takes responsibility to maintain the integrity of the data sent through dialup connection. This function is called Error Correction. This function helps modems to authenticate that the information sent has remained intact during the transfer. In error correction, modems break up the data into small packets called frames. These frames of information are then transmitted after adding a checksum to each of these frames. The receiving modem checks whether the checksum matches the information sent. If the checksum does not match then the entire frame is resent. This ensures that the only the valid data is transferred and integrity of the data is preserved.

The final task is to ensure that the flow of the data transferred over internet is maintained consistently. It is possible that the modem at the sending end is much faster then the modem at the receiving end. Here, another function called the Flow Control comes into play. To maintain the rate of data transfer, if the sending modem is capable of sending data much faster than the receiving modem then the flow control at receiving modem allows the receiving modem to tell the sending modem to pause while it catches up. The flow control can be either software or hardware flow control. With software flow control, the modem sends a certain character that signals pause when it is time to halt. When it is ready to resume, it sends a different character. Hardware flow control uses wires in the modem cable. Overall, the Hardware flow control is faster and much more reliable than software flow control.

Overall, these three functions makes up most of the internal working of a modem and help modem to transfer data over the dial up connection in an efficient and reliable way.

5. Write a short note on ADC.

An analog-to-digital converter (abbreviated ADC, A/D or A to D) is a device which converts continuous signals to discrete digital numbers. The reverse operation is performed by a digital-to-analog converter (DAC).

Typically, an ADC is an electronic device that converts an input analog voltage (or current) to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes, such as binary, Gray code or two’s complement binary.

If the probability density function of a signal being digitized is uniform, then the signal-to-noise ratio relative to the quantization noise is the best possible. Because this is often not the case, it is usual to pass the signal through its cumulative distribution function (CDF) before the quantization. This is good because the regions that are more important get quantized with a better resolution. In the dequantization process, the inverse CDF is needed.

This is the same principle behind the companders used in some tape-recorders and other communication systems, and is related to entropy maximization.

For example, a voice signal has a Laplacian distribution. This means that the region around the lowest levels, near 0, carries more information than the regions with higher amplitudes. Because of this, logarithmic ADCs are very common in voice communication systems to increase the dynamic range of the representable values while retaining fine-granular fidelity in the low-amplitude region.

An eight-bit A-law or the µ-law logarithmic ADC covers the wide dynamic range and has a high resolution in the critical low-amplitude region, that would otherwise require a 12-bit linear ADC.

All ADCs suffer from non-linearity errors caused by their physical imperfections, causing their output to deviate from a linear function (or some other function, in the case of a deliberately non-linear ADC) of their input. These errors can sometimes be mitigated by calibration, or prevented by testing.

Important parameters for linearity are integral non-linearity (INL) and differential non-linearity (DNL). These non-linearities reduce the dynamic range of the signals that can be digitized by the ADC, also reducing the effective resolution of the ADC.

An ADC has several sources of errors. Quantization error and (assuming the ADC is intended to be linear) non-linearity is intrinsic to any analog-to-digital conversion. There is also a so-called aperture error which is due to a clock jitter and is revealed when digitizing a time-variant signal (not a constant value).

These errors are measured in a unit called the LSB, which is an abbreviation for least significant bit. In the above example of an eight-bit ADC, an error of one LSB is 1/256 of the full signal range, or about 0.4%.

The analog signal is continuous in time and it is necessary to convert this to a flow of digital values. It is therefore required to define the rate at which new digital values are sampled from the analog signal. The rate of new values is called the sampling rate or sampling frequency of the converter.

A continuously varying band limited signal can be sampled (that is, the signal values at intervals of time T, the sampling time, are measured and stored) and then the original signal can be exactly reproduced from the discrete-time values by an interpolation formula. The accuracy is limited by quantization error. However, this faithful reproduction is only possible if the sampling rate is higher than twice the highest frequency of the signal. This is essentially what is embodied in the Shannon-Nyquist sampling theorem.

6. Draw and explain the operation of parallel-in-parallel-out shift register.

The purpose of the parallel-in/ parallel-out shift register is to take in parallel data, shift it, then output it as shown below. A universal shift register is a do-everything device in addition to the parallel-in/ parallel-out function.

Above we apply four bit of data to a parallel-in/ parallel-out shift register at DA DB DC DD. The mode control, which may be multiple inputs, controls parallel loading vs shifting. The mode control may also control the direction of shifting in some real devices. The data will be shifted one bit position for each clock pulse. The shifted data is available at the outputs QA QB QC QD . The “data in” and “data out” are provided for cascading of multiple stages. Though, above, we can only cascade data for right shifting. We could accommodate cascading of left-shift data by adding a pair of left pointing signals, “data in” and “data out”, above.

Above, a data pattern is presented to inputs DA DB DC DD. The pattern is loaded to QA QB QC QD . Then it is shifted one bit to the right. The incoming data is indicated by X, meaning the we do no know what it is. If the input (SER) were grounded, for example, we would know what data (0) was shifted in. Also shown, is right shifting by two positions, requiring two clocks.

The above figure serves as a reference for the hardware involved in right shifting of data. It is too simple to even bother with this figure, except for comparison to more complex figures to follow.

Right shifting of data is provided above for reference to the previous right shifter.

If we need to shift left, the FFs need to be rewired. Compare to the previous right shifter. Also, SI and SO have been reversed. SI shifts to QC. QC shifts to QB. QB shifts to QA. QA leaves on the SO connection, where it could cascade to another shifter SI. This left shift sequence is backwards from the right shift sequence.

Above we shift the same data pattern left by one bit.

7. Design the counter that goes through states 0, 1, 2, 4, 0…using D flip-flops

. .

8. Explain two way switches.

A switch may be directly manipulated by a human as a control signal to a system, such as a computer keyboard button, or to control power flow in a circuit, such as a light switch. Automatically-operated switches can be used to control the motions of machines, for example, to indicate that a garage door has reached its full open position or that a machine tool is in a position to accept another workpiece. Switches may be operated by process variables such as pressure, temperature, flow, current, voltage, and force, acting as sensors in a process and used to automatically control a system. For example, a thermostat is an automatically-operated switch used to control a heating process. A switch that is operated by another electrical circuit is called a relay. Large switches may be remotely operated by a motor drive mechanism. Some switches are used to isolate electric power from a system, providing a visible point of isolation that can be pad-locked if necessary to prevent accidental operation of a machine during maintenance, or to prevent electric shock.

A biased switch is one containing a spring that returns the actuator to a certain position. The “on-off” notation can be modified by placing parentheses around all positions other than the resting position. For example, an (on)-off-(on) switch can be switched on by moving the actuator in either direction away from the centre, but returns to the central off position when the actuator is released.

The momentary push-button switch is a type of biased switch. The most common type is a “push-to-make” (or normally-open or NO) switch, which makes contact when the button is pressed and breaks when the button is released. Each key of a computer keyboard, for example, is a normally-open “push-to-make” switch. A “push-to-break” (or normally-closed or NC) switch, on the other hand, breaks contact when the button is pressed and makes contact when it is released. An example of a push-to-break switch is a button used to release a door held open by an electromagnet.

Since the advent of digital logic in the 1950s, the term switch has spread to a variety of digital active devices such as transistors and logic gates whose function is to change their output state between two logic levels or connect different signal lines, and even computers, network switches, whose function is to provide connections between different ports in a computer network.[6] The term ‘switched’ is also applied to telecommunications networks, and signifies a network that is circuit switched, providing dedicated circuits for communication between end nodes, such as the public switched telephone network. The common feature of all these usages is they refer to devices that control a binary state: they are either on or off, closed or open, connected or not connected.

9. Write a short note on Digital Versatile Disk.

DVD, also known as Digital Video Disc or Digital Versatile Disc, is an optical disc storage media format, and was invented and developed by Philips, Sony, TOSHIBA, and Time Warner in 1995. Its main uses are video and data storage. DVDs are of the same dimensions as comp Variations of the term DVD often indicate the way data is stored on the discs: DVD-ROM (read only memory) has data that can only be read and not written; DVD-R and DVD+R (recordable) can record data only once, and then function as a DVD-ROM; DVD-RW (re-writable), DVD+RW, and DVD-RAM (random access memory) can all record and erase data multiple times. The wavelength used by standard DVD lasers is 650 nm;[4] thus, the light has a red color.

DVD-Video and DVD-Audio discs refer to properly formatted and structured video and audio content, respectively. Other types of DVDs, including those with video content, may be referred to as DVD Data discs.

The basic types of DVD (12 cm diameter, single-sided or homogeneous double-sided) are referred to by a rough approximation of their capacity in gigabytes. In draft versions of the specification, DVD-5 indeed held five gigabytes, but some parameters were changed later on as explained above, so the capacity decreased. Other formats, those with 8 cm diameter and hybrid variants, acquired similar numeric names with even larger deviation.

The 12 cm type is a standard DVD, and the 8 cm variety is known as a MiniDVD. These are the same sizes as a standard CD and a mini-CD, respectively. The capacity by surface (MiB/cm2) varies from 6.92 MiB/cm2 in the DVD-1 to 18.0 MiB/cm2 in the DVD-18.

As with hard disk drives, in the DVD realm, gigabyte and the symbol GB are usually used in the SI sense (i.e., 109, or 1,000,000,000 bytes). For distinction, gibibyte (with symbol GiB) is used (i.e., 230, or 1,073,741,824 bytes). Most computer operating systems display file sizes in gibibytes, mebibytes, and kibibytes, labeled as gigabyte, megabyte, and kilobyte, respectively.

10. Write a note on DAC types.

A DAC converts an abstract finite-precision number (usually a fixed-point binary number) into a concrete physical quantity (e.g., a voltage or a pressure). In particular, DACs are often used to convert finite-precision time series data to a continually varying physical signal.

. The most common types of electronic DACs are:

  • the pulse-width modulator, the simplest DAC type. A stable current or voltage is switched into a low-pass analog filter with a duration determined by the digital input code. This technique is often used for electric motor speed control, and is now becoming common in high-fidelity audio.
  • Oversampling DACs or interpolating DACs such as the delta-sigma DAC, use a pulse density conversion technique. The oversampling technique allows for the use of a lower resolution DAC internally. A simple 1-bit DAC is often chosen because the oversampled result is inherently linear. The DAC is driven with a pulse-density modulated signal, created with the use of a low-pass filter, step nonlinearity (the actual 1-bit DAC), and negative feedback loop, in a technique called delta-sigma modulation. This results in an effective high-pass filter acting on the quantization (signal processing) noise, thus steering this noise out of the low frequencies of interest into the high frequencies of little interest, which is called noise shaping (very high frequencies because of the oversampling). The quantization noise at these high frequencies are removed or greatly attenuated by use of an analog low-pass filter at the output (sometimes a simple RC low-pass circuit is sufficient). Most very high resolution DACs (greater than 16 bits) are of this type due to its high linearity and low cost. Higher oversampling rates can either relax the specifications of the output low-pass filter and enable further suppression of quantization noise. Speeds of greater than 100 thousand samples per second (for example, 192 kHz) and resolutions of 24 bits are attainable with delta-sigma DACs. A short comparison with pulse-width modulation shows that a 1-bit DAC with a simple first-order integrator would have to run at 3 THz (which is physically unrealizable) to achieve 24 meaningful bits of resolution, requiring a higher-order low-pass filter in the noise-shaping loop. A single integrator is a low-pass filter with a frequency response inversely proportional to frequency and using one such integrator in the noise-shaping loop is a first order delta-sigma modulator. Multiple higher order topologies (such as MASH) are used to achieve higher degrees of noise-shaping with a stable topology.
  • the binary-weighted DAC, which contains one resistor or current source for each bit of the DAC connected to a summing point. These precise voltages or currents sum to the correct output value. This is one of the fastest conversion methods but suffers from poor accuracy because of the high precision required for each individual voltage or current. Such high-precision resistors and current sources are expensive, so this type of converter is usually limited to 8-bit resolution or less.
  • the R-2R ladder DAC which is a binary-weighted DAC that uses a repeating cascaded structure of resistor values R and 2R. This improves the precision due to the relative ease of producing equal valued-matched resistors (or current sources). However, wide converters perform slowly due to increasingly large RC-constants for each added R-2R link.
  • the thermometer-coded DAC, which contains an equal resistor or current-source segment for each possible value of DAC output. An 8-bit thermometer DAC would have 255 segments, and a 16-bit thermometer DAC would have 65,535 segments. This is perhaps the fastest and highest precision DAC architecture but at the expense of high cost. Conversion speeds of >1 billion samples per second have been reached with this type of DAC.
  • Hybrid DACs, which use a combination of the above techniques in a single converter. Most DAC integrated circuits are of this type due to the difficulty of getting low cost, high speed and high precision in one device.
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